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MP1475S high-efficiency, 3a, 16v, 500khz synchronous, step-down converter MP1475S rev. 1.0 www.monolithicpower.com 1 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. the future of analog ic technology description the MP1475S is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power mosfets. it offers a compact solution to achieve a 3a continuous output current with excellent load and line regulation over a wide input-supply range. the MP1475S has synchronous-mode operation for higher efficiency over the output current-load range. current-mode operation provides fast, transient response and eases loop stabilization. full protection features include over-current protection (ocp) and thermal shut down (tsd). the MP1475S requires a minimal number of readily available, standard, external components and is available in a space-saving 8-pin tsot23 package. features ? wide 4.5v to 16v operating-input range ? 120m ? /50m ? low r ds(on) internal power mosfets ? high-efficiency synchronous-mode operation ? fixed 500khz switching frequency ? synchronizes from a 300khz to 2mhz external clock ? power-save mode at light load ? internal soft-start ? power good indicator ? over-current protection and hiccup ? thermal shutdown ? output adjustable from 0.8v ? available in a 8-pin tsot-23 package applications ? notebook systems and i/o power ? digital set-top boxes ? flat-panel television and monitors ? distributed power systems a ll mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithi c power systems, inc. typical application 12v
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 2 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. ordering information part number* package top marking MP1475Sgj tsot23-8 see below * for tape & reel, add suffix ?z (e.g. MP1475Sgj?z); top marking amx: product code of MP1475Sgj; y: year code; package reference pg in sw gnd fb vcc en/sync bst 1 2 3 4 8 7 6 5 top view tsot23-8
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 3 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. absolute maximum ratings (1) v in ................................................ -0.3v to 17v v sw .................................................................... -0.3v (-5v for <10ns) to 17v (19v for <10ns) v bst ...................................................... v sw +6v all other pins ................................ -0.3v to 6v (2) continuous power dissipation (t a = +25c) (3) .......................................................... 1.25w junction temper ature .............................. 150c lead temperat ure ................................... 260c storage temperature ................. -65c to 150c recommended operating conditions (4) supply voltage v in .......................... 4.5v to 16v output voltage v out ............... 0.8v to v in *d max v operating junction temp. (t j ). -40c to +125c thermal resistance (5) ja jc tsot23-8 ............................. 100 ..... 55 ... c/w notes: 1) exceeding these ratings may damage the device. 2) about the details of en/sync pin?s abs max rating, please refer to page 12, enable/sync control section. 3) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanen t damage. 4) the device is not guaranteed to function outside of its operating conditions. 5) measured on jesd51-7, 4-layer pcb.
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 4 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. electrical characteristics v in = 12v, t j = -40c to +125c, unless otherwise noted. typical value is tested at t j =+25c. paramete r symbol condition min typ max units supply current (shutdown) i in v en = 0v 2 a supply current (quiescent) i q v en = 2v, v fb = 1v 0.5 1 ma hs switch-on resistance hs rds-on v bst-sw =5v 120 m ? ls switch-on resistance ls rds-on v cc =5v 50 m ? switch leakage sw lkg v en = 0v, v sw =12v or 0v 1 a current limit (6) i limit under 40% duty cycle t j =+25c 3.7 5 a t j =-40c to +125c 3.5 a oscillator frequency f sw v fb =0.75v t j =+25c 410 500 630 khz t j =-40c to +125c 350 650 khz foldback frequency f fb v fb <400mv 0.5 f sw maximum duty cycle d max v fb =700mv 90 95 % minimum on time (6) t on-min 40 ns sync frequency range f sync 0.3 2 mhz feedback voltage v fb t j =25c 791 807 823 mv -40c MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 5 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. typical performance characteristics performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v, l=4.7 h, t a = 25c, unless otherwise noted.
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 6 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. typical performance characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v, l=4.7 h, t a = 25c, unless otherwise noted. 0 5 10 15 20 25 30 35 40 45 50 00.511.522.53 input voltage(v) current limit(a) v in (v) line regulation v out =3.3v, v in =5-16v case temperature rise vs. output current i out =0a-3a disabled supply current vs. input voltage v in =4.5v to 16v v en =0v enabled supply current vs. input voltage v in =4.5v to 16v v fb =1v current limit vs. duty cycle output current(a) input voltage(v) -0.2 -0.15 -0.1 -0.05 0 0.05 0.1 0.15 0.2 4812 16 i out =0a i out =3a i out =1.5a v out =3.3v v out =5v 3 3.5 4 4.5 5 5.5 6 0 1020304050607080 0 1 2 3 4 5 6 4681012141618 450 460 470 480 490 500 510 520 530 4 6 8 10 12 14 16 18 -0.7 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0 0.5 1 1.5 2 2.5 3 3.5 load current(a) v in =12v v in =16v v in =5v
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 7 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. typical performance characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v, l=4.7 h, t a = 25c, unless otherwise noted. start-up through enable i out =3a shutdown through enable i out =0a shutdown through enable i out =3a start-up through input voltage i out =0a start-up through input voltage i out =3a shutdown through input voltage i out =0a v en 5v/div. v sw 10v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. v in 5v/div. v sw 5v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. v in 5v/div. v sw 5v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. v in 5v/div. v sw 5v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. v en 5v/div. v sw 10v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. v en 5v/div. v sw 10v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. short recovery i out =0a start-up through enable i out =0a short entry i out =0a v out 2v/div. v pg 5v/div. v sw 10v/div. v in 10v/div. i inductor 5a/div. v out 2v/div. v pg 5v/div. v sw 10v/div. v in 10v/div. i inductor 5a/div. v out 2v/div. v pg 5v/div. v sw 10v/div. v en 5v/div. i inductor 2a/div.
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 8 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. typical performance characteristics (continued) performance waveforms are tested on the evaluation board of the design example section. v in = 12v, v out = 3.3v, l=4.7 h, t a = 25c, unless otherwise noted. shutdown through input voltage i out =3a input / output ripple i out =3a v sw 10v/div. i out 2a/div. v in/ ac 200mv/div. v out /ac 20mv/div. v out /ac 100mv/div. i inductor 2a/div. v in 5v/div. v sw 5v/div. v out 2v/div. v pg 5v/div. i inductor 2a/div. load transient reponse i out =1.5a-3a
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 9 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. pin functions package pin # name description 1 pg power good indicator. pg is the open drain of the internal mosfet and should be connected to vcc (or another voltage source) through a resistor (e.g. 100k). when the fb voltage reaches 90% of the ref voltage, pg is pulled high (after a 0.6ms delay). after the fb voltage drops to 85% of the ref voltage, pg is pulled low. 2 in supply voltage. in supplies power for the internal mosfet and regulator. the MP1475S operates from a +4.5v to +16v input rail; it requires a low esr and a low-inductance capacitor (c1) to decouple the input rail. place the input capacitor very close to in and connect it with wide pcb traces and multiple vias. 3 sw switch output. connect sw to the inductor and bootstrap capacitor. sw is driven up to v in by the high-side switch during the pwm duty cycle on-time. the inductor current drives sw negative during the off-time. the on resistance of the low-side switch and the internal body diode fixes the negative voltage. connect using wide pcb traces and multiple vias. 4 gnd system ground. gnd is the reference ground of the regulated output voltage. pcb layout requires extra care (see recommended ?pcb layout guidelines? on page 16). for best results, connect to gnd with copper and vias. 5 bst bootstrap. bst requires a capacitor connected between sw and bst to form a floating supply across the high-side switch driver. 6 en/sync enable/synchronize. en/sync=high to enable the MP1475S. apply an external clock to change the switching frequency. for automatic start-up, connect en/sync to v in with a 100k ? resistor. 7 vcc internal 5v ldo output. vcc powers the driver and control circuits. decouple with a 0.1 f to 0.22 f capacitor. do not use a capacitor 0.22 f. 8 fb feedback. connect fb to the tap of an external resistor divider from the output to gnd to set the output voltage. to prevent current-limit runaway during a short-circuit fault, the frequency foldback comparator lowers the oscillator frequency when the fb voltage is below 400mv. place the resistor divider as close to fb as possible. avoid placing vias on the fb traces.
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 10 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. functional block diagram figure 1. functional block diagram
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 11 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. operation the MP1475S is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power mosfets. it offers a compact solution that achieves a 3a continuous output current with excellent load and line regulation over 4.5v to 16v input- supply range. the MP1475S has three working modes: advanced asynchronous modulation (aam) mode, discontinuous conduction mode (dcm), and continuous conduction mode (ccm). the load current increases as the device transitions from aam mode to dcm to ccm. aam control operation in a light-load condition, MP1475S works in advanced asynchronous modulation (aam) mode (see figure 2). the v aam is an internal fixed voltage when input and output voltages are fixed. v comp is the error-amplifier output (which represents the peak inductor-current information). when v comp is lower than v aam , the internal clock is blocked. this causes the MP1475S to skip pulses, achieving the light- load power save. refer to an032 for additional details. the internal clock re-sets every time v comp is higher than v aam . at the same time, the high- side mosfet (hs-fet) turns on and remains on until v ilsense reaches the value set by v comp. the light-load feature in this device is optimized for 12v input applications. figure 2. simplified aam control logic dcm control operation the v comp voltage ramps up as the output current increases. when its minimum value exceeds v aam , the device enters discontinuous conduction mode (dcm). in dcm, the internal clock initiates the pwm cycle, the hs-fet turns on and remains on until v ilsense reaches the value set by v comp (after a period of dead time), and the low-side mosfet (ls-fet) turns on and remains on until the inductor-current value decreases to zero. the device repeats the same operation in every clock cycle to regulate the output voltage (see figure 3). i l figure 3. dcm control operation ccm control operation the device enters continuous conduction mode (ccm) from dcm once the inductor current no longer drops to zero in a clock cycle. in ccm, the internal clock initia tes the pwm cycle, the hs-fet turns on and remains on until v ilsense reaches the value set by v comp (after a period of dead time), and the ls-fet turns on and remains on until the next clock cycle begins. the device repeats the same operation in every clock cycle to regulate the output voltage. if v ilsense does not reach the value set by v comp within 95% of one pwm period, the hs-fet is forced off. internal regulator a 5v internal regulator powers most of the internal circuitries. this regulator is supplied by v in and operates in the full v in range. when v in exceeds 5v, the output of the regulator is in full regulation. when v in is less than 5v, the output decreases, and the device requires a 0.1f ceramic decoupling capacitor. error amplifier (ea) the error amplifier compares the fb voltage to the internal 0.807v reference (v ref ) and outputs a current proportional to the difference between the two. this output current then charges or discharges the internal compensation network to form the comp voltage, which controls the power mosfet
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 12 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. current. the optimized, internal compensation network minimizes the external component count and simplifies the control loop design. enable/sync control en/sync is a digital control pin that turns the regulator on and off. drive en/sync high to turn on the regulator; drive en/sync low to turn off the regulator. an internal 1m ? resistor from en/sync to gnd allows en/sync to be floated to shut down the chip. en/sync is clamped internally using a 6.5v series-zener-diode (see figure 4). connecting en/sync through a pull-up resistor to the voltage on in limits the en/sync input current to less than 100a. for example, with 12v connected to in, r pullup (12v ? 6.5v) 100a = 55k ? . connecting en/sync directly to a voltage source without a pull-up resistor requires limiting the amplitude of the voltage source to 6v to prevent damage to the zener diode. figure 4. 6.5v zener diode connection for external clock synchronization, connect a clock with a frequency range between 300khz and 2mhz. the internal clock rising edge synchronizes with the external clock rising edge. select an external clock signal with a pulse width less than 1.7 s. under-voltage lockout (uvlo) the MP1475S has under-voltage lockout protection (uvlo). when the vcc voltage exceeds the uvlo rising threshold voltage, the device begins to power-up. the device shuts off when the vcc voltage drops below the uvlo falling threshold voltage. this is non-latch protection. the MP1475S is disabled when the input voltage falls below 3.2v. if an application requires a higher under-voltage lockout (uvlo) threshold, use en/sync to adjust the input voltage uvlo using two external resistors (see figure 5). for best resu lts, set the uvlo falling threshold (vstop) above 4.5v using the enable resistors. set the rising threshold (vstart) to provide enough hysteresis to allow for input-supply variations. r en_up r en_down en/sync figure 5 . adjustable uvlo internal soft-start (ss) the soft-start prevents the converter output voltage from overshooting during start-up. when the chip starts up, the internal circuitry generates a soft-start voltage (v ss ) that ramps up from 0v to 1.2v. when v ss is less than v ref , the error amplifier uses v ss as the reference. when v ss exceeds v ref , the error amplifier uses v ref as the reference. the ss time is set internally to 1.2ms. pre-bias start-up the MP1475S is designed for a monotonic start-up into pre-biased loads. if the output is pre-biased to a certain voltage during start-up, the bst voltage is refreshed and charged. also, the voltage on the soft-start capacitor is charged. if bst voltage exceeds its rising threshold voltage, and the soft-start capacitor voltage exceeds the sensed-output voltage at fb, the device starts to operate normally. power good indicator (pg) MP1475S has an open-drain pin as the power good indicator (pg). pull pg up to vcc (or another external source) through a 100k ? resistor. when v fb exceeds 90% of v ref , pg goes high (after a 0.6ms delay time). if v fb falls below 85% of v ref , an internal mosfet pulls pg down to ground.
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 13 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. over-current protection (ocp) and hiccup the MP1475S has a cycle-by-cycle over- current limit when the inductor current peak value exceeds the set current-limit threshold. meanwhile, the output voltage drops until v fb is below the under-voltage (uv) threshold (50% below the reference, typically). once uv is triggered, the MP1475S enters hiccup mode to re-start the part periodically. this protection mode is useful when the output is dead-shorted to ground and greatly reduces the average short-circuit current to alleviate thermal issues and protect the regulator. the MP1475S exits hiccup mode once the over-current condition is removed. thermal shutdown (tsd) thermal shutdown prevents the chip from operating at exceedingly high temperatures. when the die temperature exceeds 150c, it shuts down the whole chip. when the temperature drops below its lower threshold (130c, typically), the chip is enabled again. floating driver and bootstrap charging an external bootstrap capacitor powers the floating power mosfet driver. this floating driver has its own uvlo protection. the uvlo?s rising threshold is 2.2v with a hysteresis of 150mv. the bootstrap capacitor voltage is regulated internally by v in through d1, m1, r3, c4, l1, and c2 (see figure 6). if (v in - v sw ) exceeds 5v, u1 regulates m1 to maintain a 5v bst voltage across c4. it is recommended strongly to place a 20 ? resistor between the sw and bst cap to reduce sw spike voltage. v in d1 5v m1 u1 bst c4 sw l1 v out c2 r3 figure 6. internal bootstrap charging circuit start-up and shutdown if both v in and v en exceed their respective thresholds, the chip starts up. the reference block starts first, generating stable reference voltage and currents, then the internal regulator is enabled. the regulator provides a stable supply for the remaining circuitries. three events can shut down the chip: v en low, v in low, and thermal shutdown. during the shutdown procedure, the signaling path is blocked first to avoid any fault triggering. the comp voltage and the internal supply rail are then pulled down. the floating driver is not subject to this shutdown command.
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 14 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. application information setting the output voltage the external resistor divider sets the output voltage (see ?typical application? on page 1). choose r1 around 40.2k ? ; r2 is then given by: out r1 r2 v 1 0.807v = ? the t-type network is recommended highly when v out is low (see figure 7). figure 7. t-type network table 1 lists the recommended t-type resistor values for common output voltages. table 1. resistor selection for common output voltages (8) v out (v) r1 (k ? ) r2 (k ? ) rt (k ? ) 1.0 20.5 84.5 82 1.2 30.1 61.9 82 1.8 40.2 32.4 33 2.5 40.2 19.1 33 3.3 40.2 13 16 5 40.2 7.68 16 notes: 8) the recommended parameters are based on a 500khz switching frequency; a different input voltage, output-inductor value, and output-capacitor value may affect the selection of r1, r2, and rt. for additional component parameters, please refer to the ?typical application circuits? section on pages 17 and 18. selecting the inductor for most applications, use a1h to 22h inductor with a dc current rating at least 25% higher than the maximum load current. for highest efficiency, use an inductor with a dc resistance less than 15m ? . for most designs, the inductance value is derived from the following equation: out in out 1 in l osc v(vv) l vif ? = where i l is the inductor-ripple current. choose an inductor-ripple current approximately 30% of the maximum load current. the maximum inductor peak current is calculated by the following equation: 2 i i i l load ) max ( l + = use a larger inductor for improved efficiency under light-load conditions (below 100ma). selecting the input capacitor the input current to the step-down converter is discontinuous, therefore it requires a capacitor to supply the ac current while maintaining the dc input voltage. use low esr capacitors for optimum performance. use ceramic capacitors with x5r or x7r dielectrics for best results because of their low esr and small temperature coefficients. for most applications, use a 22f capacitor. since c1 absorbs the input-switching current, it requires an adequate ripple-current rating. the rms current in the input capacitor is estimated by: ? ? ? ? ? ? ? ? ? = in out in out load 1 c v v 1 v v i i the worst case condition occurs at v in = 2v out , where: 2 i i load 1 c = for simplification, choose an input capacitor that has a rms current rating greater than half of the maximum load current. the input capacitor can be electrolytic, tantalum, or ceramic. when using electrolytic or tantalum capacitors, a small, high-quality ceramic capacitor (e.g. 0.1 f) should be placed as close to the ic as possible. when using ceramic capacitors, ensure that they have enough capacitance to provide sufficient charge
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 15 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. in order to prevent excessive voltage ripple at input. the input-voltage ripple caused by capacitance is estimated as: load out out in in sin iv v v1 fc1v v ?? = ? ?? ?? selecting the output capacitor the output capacitor (c2) maintains the dc output voltage. use ceramic, tantalum, or low esr electrolytic capacitors. for optimum results, use low esr capacitors to keep the output-voltage ripple low. the output-voltage ripple is estimated as: out out out esr s1 in s vv 1 v1r fl v 8fc2 ?? ?? = ? + ?? ?? ??? ? where l 1 is the inductor value and r esr is the equivalent series resistance (esr) value of the output capacitor. for ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and the capacitance causes the majority of the output-voltage ripple. for simplification, the output-voltage ripple can be estimated as: out out out 2 in s1 vv v1 v 8f l c2 ?? =? ?? ?? for tantalum or electrolytic capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output-ripple is approximated as: out out out esr in s1 vv v1r fl v ?? =? ?? ?? the characteristics of the output capacitor affect the stability of the regulation system. the MP1475S can be optimized for a wide range of capacitance and esr values. external bootstrap diode in particular conditions, bst voltage may become insufficient (see equations below). during these conditions an external bootstrap diode can enhance the efficiency of the regulator and avoid insufficient bst voltage at light-load pfm operation. insufficient bst voltage is more likely to occur during either of the following conditions: z v in is below 5v z v out is 5v or 3.3v; and d uty cycle is high: d= in out v v >65% if the bst voltage is insufficient, the output- ripple voltage may become extremely large during a light-load condition. if this occurs, add an external bst diode from vcc to bst (see figure 8). MP1475S figure 8. optional external bootstrap diode to enhance efficiency the recommended external bst diode is in4148, and the bst capacitor value is 0.1f to1 f.
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 16 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. pcb layout guidelines (9) efficient pcb layout is critical to achieve stable operation, especially for the placement of the vcc capacitor and input capacitor. for best results, refer to figure 9 and the guidelines below: 1. use large ground plane to connect directly to gnd. if the bottom layer is ground plane, add vias near gnd. 2. place the vcc capacitor as close as possible to vcc and gnd. the trace length of vcc to the vcc capacitor anode to the vcc capacitor cathode to gnd should be as short as possible. 3. place the ceramic input capacitor close to in and gnd. keep the connection between the input capacitor and in as short and wide as possible. 4. route sw and bst away from sensitive analog areas (such as fb). 5. place the t-type feedback resistor r6 very close to the chip to ensure the trace connected to fb is as short as possible. notes: 9) the recommended layout is based on figure 10 in the ?typical application circuits? section on page 17. top layer gnd sw bst gnd vout en/sync vcc bottom layer figure 9. recommended pcb layout design example table 2 shows a design example following the application guidelines for the specifications: table 2. design example v in 12v v out 3.3v i out 3a the detailed application schematic is shown in figure 11. the typical performance and circuit waveforms have been shown in the ?typical performance characteristics? section. for more device applications, please refer to the related evaluation board datasheets.
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 17 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. typical application circuits vcc 25v c1 22uf 0.1uf c1a 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 4.7uh l1 40.2k r1 7.68k r2 gnd gnd 16k r6 5v/3a MP1475S 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 10. 12v in , 5v/3a output vcc 25v c1 22uf 0.1uf c1a 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 4.7uh l1 40.2k r1 13k r2 gnd gnd 16k r6 3.3v/3a MP1475S 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 11. 12v in , 3.3v/3a output vcc 25v c1 22uf 0.1uf c1a 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 3.3uh l1 40.2k r1 19.1k r2 gnd gnd 33k r6 2.5v/3a MP1475S 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 12. 12v in , 2.5v/3a output
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter MP1475S rev. 1.0 www.monolithicpower.com 18 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. vcc 25v c1 22uf 0.1uf c1a 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 3.3uh l1 40.2k r1 32.4k r2 gnd gnd 33k r6 1.8v/3a MP1475S 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 13. 12v in , 1.8v/3a output vcc 25v c1 22uf 0.1uf c1a 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 2.2uh l1 30.1k r1 61.9k r2 gnd gnd 82k r6 1.2v/3a MP1475S 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 14. 12v in , 1.2v/3a output vcc 25v c1 22uf 0.1uf c1a 25v 0.1uf c5 gnd gnd gnd gnd gnd pg en/sync vout 100k r5 vin 100k r4 20 r3 0.1uf c4 22uf c2a 22uf c2 15pf c3 2.2uh l1 20.5k r1 84.5k r2 gnd gnd 82k r6 1v/3a MP1475S 2 7 1 6 5 3 8 4 bst sw en/sync vcc in gnd fb pg figure 15. 12v in , 1v/3a output
MP1475S ? high-efficiency, 3a, 16v, 500khz synchronous step-down converter notice: the information in this document is subject to change without notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP1475S rev. 1.0 www.monolithicpower.com 19 1/8/2015 mps proprietary information. patent protected. unauthorized photocopy and duplication prohibited. ? 2015 mps. all rights reserved. package information tsot23-8

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